Common problems in PCB production and design

I. Overlap of pad

1. The overlap of the pad (except the surface sticking to the pad) means the overlap of the hole. In the drilling process, the drill bit will be broken because of multiple drilling in a place, leading to the damage of the hole.

2, the two holes in the multilayer plate overlap, such as a hole position for the isolation plate, the other hole position for the connection plate (welding plate), so that the film is drawn after the performance of the isolation plate, resulting in scrap.

Second, the setting of single-side pad aperture

1. Single side pad is generally not drilled. If drilling needs to be marked, its aperture should be designed to be zero. Problems arise if the values are designed so that the coordinates of the holes appear at this location when the borehole data is generated.

2, single-side welding pad such as drilling should be specially marked.

Three, graphic layer abuse

1, in some graphic layer to do some useless connection, originally is four layers of the board but designed more than five layers of the line, causing misunderstanding.

2. Save time in the design. Take Protel software as an example to draw all the lines of each layer with the Board layer, and use the Board layer to mark the line. So keep the graphics layer complete and clear when designing.

3, against the conventional design, such as the component surface design in the Bottom layer, welding surface design in the Top, causing inconvenience.

Four, character misplacement

1. Character cover pad SMD weld, which brings inconvenience to on-off test of printed board and welding of components.

2, the character design is too small, resulting in screen printing difficulties, too large so that the characters overlap each other, difficult to distinguish.

5. The definition of processing level is not clear

1, single panel design in the TOP layer, such as positive and negative without instructions, may be made out of the board installed on the device and not good welding.

2. For example, TOPmid1 and mid2 bottom layers are used in the design of a four-layer board, but they are not placed in such order during processing, which requires clarification.

6. Too many filling blocks in the design or filling blocks are filled with very thin lines

1. The phenomenon of loss of optical drawing data is generated, and the optical drawing data is incomplete.

2. Because the filling block is drawn line by line in the processing of optical drawing data, the amount of optical drawing data generated is quite large, which increases the difficulty of data processing.

Seven. Paint the pad with a filling block

Drawing pad with filler blocks can pass DRC inspection when designing lines, but it is not feasible for processing. Therefore, welding resistance data cannot be generated directly from similar pad. When applying solder resistance, the filler block area will be covered by solder resistance, resulting in difficulty in welding components.

Eight, surface mount device welding pad is too short

This is for on-off testing, for too dense surface mount devices, the spacing between the feet is quite small, the pad is also quite thin, installation test needle, must be up and down (left and right) staggered position, such as the pad design is too short, although it does not affect the installation of components, but will make the test needle wrong not open.

Nine, large area grid spacing is too small

The edge between the grid lines of a large area is too small (less than 0.3mm). In the manufacturing process of printed board, many broken films are likely to be attached to the board after the drawing process is finished, resulting in broken lines.

Ten, the electric formation is flower welding pad is wired

Because the power supply is designed as a flower pad, the formation is opposite to the image on the actual printed board, and all the lines are isolation lines, which the designer should be very clear about. By the way, care should be taken when drawing isolation lines for several groups of power supplies or for several types of land, so as not to leave gaps that short circuit the two groups of power supplies or cause the area of the connection to be blocked (so that one group of power supplies is separated).

Related Properties

① BACKDRILL_MAX_PTH_STUB(net) : A BACKDRILL_MAX_PTH_STUB property must be added to constraintmanager for the backdrill_constraintManager.

Back drilling needs to be considered for this network. In the constraintmanager→net→generalproperties→worksheet→backdrill item, select the desired project and right-click, select change from the pop-up shortcut menu, and enter the value of maximumstub. The stub is calculated as top and bottom stubs are counted as the maximum stub length.

②.BACKDRILL_EXCLUDE: This property is defined so that the associated target is not backdrilled. This property can be assigned to symbol, pin, via, or even appended to libraries when they are being built.

③.BACKDRILL_MIN_PIN_PTH property: ensures minimum through hole metallization depth

(4) BACKDRILL_OVERRIDE property: Users can customize the scope of backdrill, which is also useful, especially for simple, consistent backdrill depth designs.

⑤.BACKDRILL_PRESSFIT_CONNECTOR property: This property is set for the crimp connector. In general, the back drill will recognize the crimp device and will not back drill from the device face, if required to back drill from both sides.

Crimp devices must be assigned the BACKDRILL_PRESSFIT_CONNECTOR property. When single-sided or double-sided backdrilling is required for crimping devices, the backdrilling depth will not enter the required effective connection area for crimping devices after this parameter is specified. Value, where values=pincontactrange, which must be obtained from the manufacturer of the crimped device.

After the properties for the back drill are set, it is the analysis of the back drill, start the menu command: Manufacture - NCbackdrillsetupandanalysis, start back to drill interface analysis window, select newpassset, set some back drilling parameters, analysis will produce report, there is conflict with details.

If the analysis is OK, then the backdrill setup is complete and you need to select the includebackdrill in the window of the post-processed light drawing output phase such as NC-Drilllegend and NCDrill, then execute to generate the backdrill borehole bitmap and borehole file.