1. The structural principle of the electronic responder
1.1 The overall structure of the electronic responder
The overall structure of the electronic responder is shown in Figure 1. It includes identification and latching module, timing and foul setting module and scoring module.
Design and implementation of electronic responder based on EDA development system
1.2 Identification and latch module design
The main function of the identification and latch module is to judge the order of the four groups a, b, c and d, record the group number of the first to answer, and no longer accept other input signals, and lock the group of the first to answer, and display the group of the first to answer.
According to the above functional requirements, the source program of the module ** contains four response input signals. Now its signals are set as a, b, c and d respectively; The signal is set as sta. After the input of the signal, the output indicator will light up, so that the player can know that the signal has been sent. Therefore, the output indicator signal of a sta can be set as star-t; In order to identify the first responder, the output indicator of group a, b, c and d can be set as led_a, led_b, led_c and led_d respectively, and the output signal showing the number of the first responder group can be set as states [3.. 0]. In order to make the system enter the reset state, it is also necessary to set a system reset signal, which can be set as rst. The simulation waveform of its authentication and latching module is shown in Figure .
Design and implementation of electronic responder based on EDA development system
As can be seen from Figure 2, when rst=1, the system is in the initial state and all inputs are invalid. When rst=O and sta=O, preemptive answer is invalid; When rst=O and sta=1, the start indicator light is on, group d is the first effective response group, and led_d indicator light is on, and the successful response group d is "0100". Through the imitation and analysis in Figure 2, it can be seen that the function design of its identification and latch module is correct.
1.3 Design of timing and foul module of electronic buzzer
The main function of timing and foul module is to answer questions. When the * time meter is 0, the system will output an alarm signal to give a buzzer warning to those who respond in advance and display the foul group number.
According to the above functional design requirements, this module needs to set a backward counter to limit the answering time, and its signal can be set as time [7..0]. In order to enable the countdown timer to start or stop working, a timing enable input signal en should be set; In order to determine whether there is an early answer or a * time answer, sta, four inputs (a, b, c, d), states [3.. 0], system clock signal clk_1hz, etc. can be used as input signals. The foul alarm signal and the foul group display offender are used as output signals. The system reset input signal rst should be set in order to make the buzzer stop alarm or make the system re-enter the effective response state. The simulation waveform of timing and foul module is shown in Figure 3, in which Figure 3 (a) is the simulation of the control function of answering foul and suspending timing, and Figure 3 (b) is the simulation of the control function of answering foul.
Design and implementation of electronic responder based on EDA development system
It can be seen from Figure 3 (a) that when rst=1, the scramble answer is invalid and the initial value of the countdown timer is set to 60s. When rst=O and sta=O, group d responds in advance and the alarm starts to alarm. offen-der displays the foul group "0100", indicating that the foul group in advance is group d. Then the host press the rst key, so that rst=1, at this time the alarm stop alarm, the system into the initial state; When rs-t=O and sta=1, group a is successful, and the timing enable signal en=1. When the rising edge of clk_lhz comes, the countdown timer starts to count. When group a finishes answering the question within the limited time, the host presses the timing enable signal to make en=O, the countdown timer stops the time, and the alarm is prevented.
As can be seen from Figure 3 (b), when rst=O and sta=1, group a answered the question successfully but did not finish answering the question within the time limit. When 60s* time meter is O, an alarm was started and the offender was displayed as "0001", indicating that the offender was in group a when *. The host pressed the reset button to set rst=l and stop the alarm. The offender displayed "0000" to clear the number of the offender group and put the system in the initial state again.
1.4 Design of scoring module
The main function of the scoring module is to add points to the groups of successful and correct answers or subtract points to the groups of successful but wrong answers, which are displayed through the decoding display circuit. According to the above functional design requirements, the module needs to take the add and subtract operation add, sub and system clock clk_lhz as input signals, and the score display of each group as output signals aa0 [3.. 0], bb0 [3.. 0], cc0 [3.. o], dd0 [3.. 0]; To decide which group to give or take points from, you need to have an input signal for the group that succeeded in answering the question. Choose "chose". In order to enable the system to enter the next round of response, the system reset input signal rst should be set. The simulation model of its scoring module is shown in Figure 4.
Design and implementation of electronic responder based on EDA development system
As can be seen from FIG. 4, when rst=l, the system enters the initial state, and the initial scores of group a, b, c and d are all 5. When add=1 and a rising edge of the system clock signal clk_lhz arrives, 1 point is added to the group "0001" that chose to be identified at the moment. When the system clock signal clk_lhz comes up with a rising edge, the group "0010" that chose to be identified at the moment is subtracted 1 point.