​New challenges in high-speed and high-density PCB design, power integrity

Circuit board assembly and circuit board processing manufacturers explain that high-speed and high-density PCB design faces new challenges, shifting from signal integrity to power integrity

Facing the challenge of high-speed and high-density PCB design, designers need to change not only the tools, but also the design methods, concepts and processes.

With the increasing complexity of electronic products' functions and the improvement of their performance, the density of printed circuit boards and the frequency of their related components are rising, and the challenges brought by high-speed and high-density PCB design that engineers are facing are also increasing.

With the increasing competition, manufacturers are facing more and more pressure on the time of product launch. How to use advanced EDA tools and optimization methods and processes to complete the design with high quality and efficiency has become a problem that system manufacturers and design engineers have to face.

Hot spot: transfer from signal integrity to power integrity

When it comes to high-speed design, the first thing people think of is signal integrity. Signal integrity mainly refers to the quality of signal transmission on the signal line. When the signal in the circuit can reach the receiving chip pin with the required timing, duration and voltage amplitude, the circuit has good signal integrity. When the signal cannot respond normally or the signal quality cannot make the system work stably for a long time, the problem of signal integrity arises. The signal integrity is mainly manifested in delay, reflection, crosstalk, timing, oscillation and other aspects. It is generally believed that when the system operates at 50MHz, signal integrity problems will occur. With the increasing frequency of the system and devices, signal integrity problems will become more prominent. The parameters of components and PCB boards, the layout of components on PCB boards, the wiring of high-speed signals, and other issues will cause signal integrity problems, leading to unstable system operation, or even complete failure.

After decades of development, the theory and analysis methods of signal integrity technology have been relatively mature. As for signal integrity, Chen Lanbing believes that signal integrity is not someone's problem. It involves every link of the design chain. Not only system design engineers, hardware engineers, and PCB engineers should consider it, but also not be ignored in manufacturing. To solve the signal integrity problem, we must use advanced simulation tools, such as Cadence's SPECTRAQuest, which can be used to model and simulate in the early stage of design, so as to form constraint rules to guide the layout and routing in the later stage and improve the design efficiency. With the introduction of Cadence's emulator MGH for gigahertz signals in June this year, which is the first emulator in the industry that can complete tens of thousands of BIT gigahertz signals in a few seconds, the signal integrity technology has improved.

Compared with signal integrity, power integrity is a relatively new technology, which is considered as one of the biggest challenges in high-speed and high-density PCB design. Power integrity refers to that in a high-speed system, the PDS power delivery system has different impedance characteristics at different frequencies, which makes the voltage between the power layer and the stratum on the PCB different everywhere on the circuit board, resulting in discontinuous power supply, power noise, and chip failure to work normally; At the same time, due to high-frequency radiation, power integrity problems will also bring about EMC/EMI problems. If the power integrity problem cannot be solved well, the normal operation of the system will be seriously affected.

Generally, the power integrity problem is solved by two ways: optimizing the stack design and layout of the circuit board, and increasing decoupling capacitance. When the system frequency is less than 300~400MHz, the decoupling capacitor can restrain the frequency, filter and impedance control. Placing a suitable decoupling capacitor at a proper position can help reduce the problem of system power supply integrity. However, when the system frequency is higher, the decoupling capacitor has little effect. In this case, the power integrity problem can only be solved by optimizing the layer spacing design of the circuit board, layout and wiring, or other methods to reduce power and ground noise (such as properly matching to reduce the reflection problem of the power transmission system), while inhibiting EMC/EMI.

For the relationship between signal integrity and power integrity, Chen Lanbing believes that: "Signal integrity is a concept of time domain, which is easy to understand, while power integrity is a concept of frequency domain, which is more difficult than signal integrity, but has similarities with signal integrity in some aspects. Power integrity requires higher skills for engineers, and is a new challenge for high-speed design. It involves not only board level, but also chip and package level. It is recommended that engineers engaged in high-speed circuit board design should The integrity of power supply is based on the solution of signal integrity. " It is reported that Cadence's power integrity tool PI has been introduced to the market and has been successfully used in the design of many customers.