Impedance PCB stack design and characteristic impedance calculation

                          Impedance PCB stack design and characteristic impedance calculation

Impedance PCB stack design is one of the necessary skills for hardware engineers and PCB engineers. Layout engineers will carry out layout design based on the stack design, including settings such as line width, line spacing, and differential routing. Characteristic impedance matching means that when the signal energy is transmitted, the load impedance is required to be equal to the characteristic impedance of the transmission line. At this time, the transmission will not produce reflection, which means that all energy is absorbed by the load, otherwise there will be energy loss during transmission. Therefore, it is also very important to master the calculation of characteristic impedance.

1. Impedance classification

(1) Single-ended impedance (Single Ended Impedance): the impedance measured by a single signal line (commonly used);

(2) Differential Impedance (Differential Impedance): Impedance measured on two equal-width and equidistant transmission lines during differential drive (commonly used);

(3) Coplanar Impedance (Coplanar Impedance): The impedance measured when the signal line is transmitted between GND/VCC around it (not commonly used).

2. Impedance Influencing Factors

(1) Proportional factors: the thickness of the medium between the line layer and the ground layer H1/H2/H3, the distance S between adjacent lines and lines;

(2) Inverse factors: dielectric constant Er, line bottom width W1, line surface width W2, copper thickness T, substrate solder mask thickness C1, line surface solder mask thickness C2, interline solder mask thickness C3, solder mask dielectric Constant CEr.

Therefore, the relational formula can be understood as Z=HS/Er*W*T*C*CEr.

3. Stack design

(1) Determining the base material: According to the environmental requirements of the product and the material preparation of the board factory, select the appropriate PCB board (extract Er). The common ones are: Shengyi S1411 150 board with Tg=150, Taiyao TU with Tg=180 -768 plate.

(2) Determining the board thickness: According to the product requirements or equipment structure requirements, determine the finished board thickness of the circuit board. The common ones are: 0.8mm, 1.0mm, 1.2mm, 1.6mm, 2.0mm, and the error is generally 10%.

(3) Determine the number of board layers: According to the density of components and signal complexity, determine the number of wiring layers of the circuit board. The common ones are: single layer, double layer, 4 layers, 6 layers, 8 layers and above.

(4) Determine the layout of the wiring layer: according to the characteristics of the product, the layout of the wiring layer is carried out. For example, the 4-layer board has: Top(Singel)-L2(GND)-L3(GND/VCC)-Bottom(Singel), this method is suitable for For most electronic equipment, SI performance is better; Top(GND)-L2(Singel/VCC)-L3(Singel/VCC)-Bottom(GND), this method is suitable for radio frequency electronic equipment, and EMI performance is better.

(5) Determine the characteristic impedance value: According to all signal types and characteristics of the product, determine all the impedance values that need to be controlled and controlled. The common ones are: single-ended characteristic impedance = 45/50/55/60 ohms, differential characteristic impedance = 85 /90/100 ohms.

(6) Design stacking parameters: According to the required impedance value, use Polar-Si9000 software to design and control the parameters of each layer of the signal line, such as line width, line spacing, interlayer dielectric thickness, copper thickness, and solder mask thickness, to design a reasonable stack Parameters, the general line width is ≥4mil, the line spacing is ≥5mil, the dielectric thickness of the signal layer and the reference layer is 2.5mil≤H≤6mil, the inner layer copper thickness=1oz, and the outer layer copper thickness + Plating=0.5oz.

(7) Design the stackup table: design the stackup table for confirmation by the board factory, and the board factory will perform fine-tuning and confirmation to obtain the final stackup table. Figure 1 below shows the general-purpose overlay table, and Figure 2 shows the special-purpose overlay table.

Note: General-purpose stackup table: It is necessary to provide additional stackup information to the board factory, and hide the information in the part of the table that does not need to control the characteristic impedance, leaving only the part that needs to be controlled.

Special stackup table: The stackup information is relatively comprehensive, no additional information is required, and the controlled characteristic impedance is also extracted.

Figure 1 General-purpose stackup table for 4-layer boards

Figure 2 Lamination table for 4-layer board

4. Calculation of characteristic impedance

Polar-Si9000 software is the impedance characteristic calculation software preferred by most engineers. The software provides a total of 93 impedance calculation modes, which fully meet the requirements of most PCB board impedance calculations, and the accuracy and precision of the calculation results are high. When choosing a different impedance calculation mode, the factors of the calculation formula are slightly different, and the basic factors are the above-mentioned H, S, Er, W1, W2, C1, C2, C3, and CEr. The reason why the line width is divided into W1 and W2 is shown in Figure 3 below. During production, the etching potion corrodes the copper surface from top to bottom, so the etched line width will show a trapezoidal shape. The difference between W1 and W2 is related to the copper thickness. The difference is generally between 0.3-1.6mil, as follows:

(1) Inner layer: when copper thickness T=1oz, W1=W2+0.5mil; when copper thickness T=2oz, W1=W2+1.2mil;

(2) Outer layer: when copper thickness T=1oz, W1=W2+1.0mil; when copper thickness T=2oz, W1=W2+1.6mil;;

(3) Confirm the relationship between W1 and W2 with the board factory.

Figure 3 Production process

As shown in Figure 4 below, it is the Edge-Coupled Coated Microstrip 1B mode of Polar-Si9000. The parameters that can be determined now are (after the plate, ink, and copper thickness are determined): Er1=4.2, T1=1.4mil, C1=0.5mil, C2 =0.4mil, C3=0.5mil, CEr=3.85; H1 is set to 5mil. The remaining adjustable parameters are (differential line width and line spacing): W1, W2, S1. At this time, you can try to set S1 first, then set W1 and W2, or set W1 and W2 first, and then set S1. For example, first set S1=7.5mil, then slowly adjust the values of W1 and W2 until the characteristic impedance value reaches the expected value (Z=100oz), at this time W1=6.6, W2=5.6. Even if the calculation of the 100 ohm differential characteristic impedance of this layer is completed at this point, if this layer or other layers still have characteristic impedance requirements, it needs to be recalculated in this way until the characteristic impedance of the entire PCB design is calculated.

Figure 4 Calculation of differential characteristic impedance 100 ohms